Counterfeit Defect Coverage Analysis (Internal Project 2013)
Counterfeit electronic components have infiltrated the supply chain over the past several years, to the point that many industry sectors and government agencies have encountered such parts in their critical systems. A series of specialized tests and inspections have been created to help detect such parts before they are embedded into the systems and deployed in the field. Each of these different types of counterfeit parts – recycled, remarked, overproduced, defective, cloned, forged documentation, and tampered – poses serious concerns to government and industry while also posing unique detection and avoidance challenges. Over the past few years, standards and programs have been put in place throughout the supply chain that outline testing, documenting, and reporting procedures. However, there is little uniformity in test results among the various entities (test labs, OEMs, and OCMs) as currently there are no metrics for evaluating the effectiveness of these test methods. One test lab could call a part authentic while another lab calls it counterfeit with high confidence. This was demonstrated in a round robin test carried out by G19-A and Honeywell, when an IC was sent to different test labs. There is an urgent need to develop metrics, algorithms, and methodologies to perform coverage analyses of the test techniques considering cost, time, application risk, counterfeit types, defect taxonomies, etc. To address these issues, in this project, we will develop comprehensive taxonomies of counterfeit types, defects, and detection methods. We will then perform test technology assessment for each of the existing methods. Next we will develop tools and methodologies for counterfeit defect coverage (CDC) analysis considering test time, test cost, and application risk.
Oct. 1, 2013 – Oct. 1, 2016
Year 1 (Due Oct. 1, 2014): We will deliver the complete set of taxonomies, new test results on counterfeit chips and the types of defects identified, the first version of the CDC algorithm(s), and the results obtained using CDC on the newly collected data by G19-A.
Year 2 (Due Oct. 1, 2015): We will deliver the complete version of CDC software with all the features added (evaluating a single, a set of, or sequence of test methods, and considering defect and counterfeit frequencies), final results on G19-A model, etc.
Year 3 (Due Oct. 1, 2016): Evaluation of UCDs, NCDs, and validation of the proposed panel of tests on a number of chips. A final report on the CDC engine, the CDC software, and all its features will also be delivered to the CHASE consortia member companies.
Prof. M. Tehranipoor. Charles H. Kanpp Associate Professor, ECE Department, UCONN
Prof. D. Forte. Assistant Professor, ECE Department, UCONN
Ujjwal Guin, PhD Student, ECE Department, UCONN
- A Comprehensive Framework for Counterfeit Defect Coverage Analysis and Detection Assessment, Journal of Electronic Testing: Theory and Applications (JETTA), 2014.
- Counterfeit Integrated Circuits: Detection, Avoidance, and the Challenges Ahead, Journal of Electronic Testing: Theory and Applications (JETTA), 2014.14-2